diff --git a/teensy4/startup.c b/teensy4/startup.c
index 2375f26c..531f15d2 100644
--- a/teensy4/startup.c
+++ b/teensy4/startup.c
@@ -420,16 +420,12 @@ FLASHMEM void configure_external_ram()
 		 | FLEXSPI_MCR2_CLRLEARNPHASE | FLEXSPI_MCR2_CLRAHBBUFOPT))
 		| FLEXSPI_MCR2_RESUMEWAIT(0x20) /*| FLEXSPI_MCR2_SAMEDEVICEEN*/;
 
-	FLEXSPI2_AHBCR = FLEXSPI2_AHBCR & ~(FLEXSPI_AHBCR_READADDROPT | FLEXSPI_AHBCR_PREFETCHEN
-		| FLEXSPI_AHBCR_BUFFERABLEEN | FLEXSPI_AHBCR_CACHABLEEN);
-	uint32_t mask = (FLEXSPI_AHBRXBUFCR0_PREFETCHEN | FLEXSPI_AHBRXBUFCR0_PRIORITY_MASK
-		| FLEXSPI_AHBRXBUFCR0_MSTRID_MASK | FLEXSPI_AHBRXBUFCR0_BUFSZ_MASK);
-	FLEXSPI2_AHBRXBUF0CR0 = (FLEXSPI2_AHBRXBUF0CR0 & ~mask)
-		| FLEXSPI_AHBRXBUFCR0_PREFETCHEN | FLEXSPI_AHBRXBUFCR0_BUFSZ(64);
-	FLEXSPI2_AHBRXBUF1CR0 = (FLEXSPI2_AHBRXBUF0CR0 & ~mask)
-		| FLEXSPI_AHBRXBUFCR0_PREFETCHEN | FLEXSPI_AHBRXBUFCR0_BUFSZ(64);
-	FLEXSPI2_AHBRXBUF2CR0 = mask;
-	FLEXSPI2_AHBRXBUF3CR0 = mask;
+	FLEXSPI2_AHBCR = FLEXSPI_AHBCR_PREFETCHEN | FLEXSPI_AHBCR_BUFFERABLEEN;
+	// disable BUF0/1/2, BUF3 will share entire buffer space between all AHB masters
+	FLEXSPI2_AHBRXBUF0CR0 = 0;
+	FLEXSPI2_AHBRXBUF1CR0 = 0;
+	FLEXSPI2_AHBRXBUF2CR0 = 0;
+	FLEXSPI2_AHBRXBUF3CR0 = FLEXSPI_AHBRXBUFCR0_PREFETCHEN;
 
 	// RX watermark = one 64 bit line
 	FLEXSPI2_IPRXFCR = (FLEXSPI_IPRXFCR & 0xFFFFFFC0) | FLEXSPI_IPRXFCR_CLRIPRXF;