Best way to extract the module instance hierarchy from a large design?

[DeeeeLAN]

I am using pyslang, I want to read in a very large design and extract the module instantiation hierarchy from it for further processing. For reference, trying to compile the design with slang needed more than 230G of memory (that is when the job got killed by the OS, I don't know how much it actually would need).

Additionally, the design is stored in a nested structure of command files, so I would need those to be able to be processed correctly. When I try to read one in now, it is either silently failing, or teling me it includes itself recursively, although I can't identify how. Further debug output on either of those cases would be nice to see.

I am thinking it might be more resource friendly (at the cost of a slower script runtime) to loop through the files one at a time, load a syntax tree, extract any instance information present, save it, then move on. Then at the end of the loop, I re-assemble the hierarchy appropriately.

Any thoughts or suggestions on how to proceed?

[MikePopoloski]

Do you actually mean the elaborated hierarchy, or do you just want to find module instantiations in the raw syntax? The latter can be done on a file-by-file basis, the former cannot. You need to be able to see the whole design to figure out what gets instantiated and where, especially because generate blocks are a thing.

Using 230G of memory to elaborate the design actually sounds like a bug to me; it's hard to imagine how large your design would have to be to legitimately hit that memory usage. Possibly slang is getting stuck in a loop somewhere and just allocating over and over? Maybe it's something you can bisect and see if a particular construct in the design is causing the problem. The Python bindings do use a fair bit more memory, but the C++ tool shouldn't have trouble with any real world design you throw at it.

[DeeeeLAN]

Interesting, I will dig at it a bit more. I do think it is possibly just huge though. We tried to extract this information with VCS and Verdi and it took over a day and a half.

We are approaching this from a verification perspective, we just want to make sure modules are instantiated where they should be and that we aren't missing anything. So I think a file-based approach would work fine.

I will let you know if I discover anything that could point towards a bug.

[ajeethakv]

As an orthogonal thought - would VPI (PLI) tree walk be an option? If all you need is a recursive print of %m that should be easy. I do have some boiler plate code for it as part of some debug apps we rolled out a while ago. I can dig out if that's of interest.

[DeeeeLAN]

Well I certainly wouldn't turn it down, we will try anything that makes sense to get to the target. Thanks for the help.

[ajeethakv]

See: https://github.com/AsFigo/verif_utils

Specifically the PrHier app - https://github.com/AsFigo/verif_utils/tree/main/afVpiPrHier

Will be happy to receive any feedback (maybe we can do via other repo issue/discussions than here if that's more appropriate)

Good luck!