From 5f175db6d4b917c0d778c7439245831869a2f7d0 Mon Sep 17 00:00:00 2001 From: Adyanth Hosavalike Date: Sat, 21 Oct 2023 15:28:06 -0700 Subject: [PATCH] :memo: Add info on return port. --- docs/PYNQ-example.rst | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/docs/PYNQ-example.rst b/docs/PYNQ-example.rst index 5175f92..0be7863 100644 --- a/docs/PYNQ-example.rst +++ b/docs/PYNQ-example.rst @@ -98,6 +98,11 @@ Make sure that **mul_test.cpp** is open. Open **Directive** and right click on t .. image:: https://github.com/KastnerRG/Read_the_docs/raw/master/docs/image/lab0_screenshot/2.png +Also add the below pragma inside the function body to get the **ap_ctrl** to be included in the **s_axilite**. This is not available (as of Vitis HLS 2023.1) in the Insert Directive GUI. + +.. code-block:: c++ + #pragma HLS INTERFACE mode=s_axilite port=return + 1.4) Synthesis and export your design ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~