From 8c9664a27bbc4cbbda67e6ab942c9cb4275b6553 Mon Sep 17 00:00:00 2001
From: Joren Dumoulin <joren.dumoulin@kuleuven.be>
Date: Thu, 30 Nov 2023 17:08:45 +0100
Subject: [PATCH] add alloc to test

---
 tests/filecheck/transforms/dispatch_regions.mlir | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tests/filecheck/transforms/dispatch_regions.mlir b/tests/filecheck/transforms/dispatch_regions.mlir
index 7a0f986b..387d6400 100644
--- a/tests/filecheck/transforms/dispatch_regions.mlir
+++ b/tests/filecheck/transforms/dispatch_regions.mlir
@@ -74,6 +74,7 @@
 "builtin.module"() ({
   "func.func"() <{"sym_name" = "simple_mult", "function_type" = (memref<64xi32>, memref<64xi32>, memref<64xi32>) -> (), "sym_visibility" = "public"}> ({
   ^0(%0 : memref<64xi32>, %1 : memref<64xi32>, %2 : memref<64xi32>):
+    %alloc = "memref.alloc"() <{"operandSegmentSizes" = array<i32: 0, 0>}> {"alignment" = 64 : i64} : () -> memref<64xi32>
     "memref.copy"(%0, %1) : (memref<64xi32>, memref<64xi32>) -> ()
     "snax.cluster_sync_op"() : () -> ()
     "linalg.generic"(%0, %1, %2) <{"indexing_maps" = [affine_map<(d0) -> (d0)>, affine_map<(d0) -> (d0)>, affine_map<(d0) -> (d0)>], "iterator_types" = [#linalg.iterator_type<parallel>], "operandSegmentSizes" = array<i32: 2, 1>}> ({
@@ -89,6 +90,7 @@
 //CHECK-NEXT:   ^0(%0 : memref<64xi32>, %1 : memref<64xi32>, %2 : memref<64xi32>):
 //CHECK-NEXT:     %3 = "func.call"() <{"callee" = @snrt_is_compute_core}> : () -> i1
 //CHECK-NEXT:     %4 = "func.call"() <{"callee" = @snrt_is_dm_core}> : () -> i1
+//CHECK-NEXT:     %alloc = "memref.alloc"() <{"operandSegmentSizes" = array<i32: 0, 0>}> {"alignment" = 64 : i64} : () -> memref<64xi32>
 //CHECK-NEXT:     "scf.if"(%4) ({
 //CHECK-NEXT:       "memref.copy"(%0, %1) : (memref<64xi32>, memref<64xi32>) -> ()
 //CHECK-NEXT:       "scf.yield"() : () -> ()