From c49118548fe4cb04da46fee3d07105644bf45a12 Mon Sep 17 00:00:00 2001
From: IveanEx <yunhao.deng@kuleuven.be>
Date: Tue, 8 Oct 2024 11:01:38 +0200
Subject: [PATCH] Bug Fix

---
 hw/occamy/occamy_chip.sv.tpl       |  2 +-
 hw/occamy/occamy_xilinx.sv.tpl     | 19 +++++++++++++++++--
 target/rtl/test/testharness.sv.tpl |  2 +-
 3 files changed, 19 insertions(+), 4 deletions(-)

diff --git a/hw/occamy/occamy_chip.sv.tpl b/hw/occamy/occamy_chip.sv.tpl
index 86aa7a95a..e20190246 100644
--- a/hw/occamy/occamy_chip.sv.tpl
+++ b/hw/occamy/occamy_chip.sv.tpl
@@ -49,8 +49,8 @@ import ${name}_pkg::*;
   output logic [1:0]  spim_csb_o,
   output logic [1:0]  spim_csb_en_o,
   output logic [3:0]  spim_sd_o,
-  output logic [3:0]  spim_sd_en_o,
   input        [3:0]  spim_sd_i,
+  output logic [3:0]  spim_sd_en_o,
 <% 
   spi_slave_present = any(periph["name"] == "spi_slave" for periph in occamy_cfg["peripherals"]["axi_lite_peripherals"])
 %>
diff --git a/hw/occamy/occamy_xilinx.sv.tpl b/hw/occamy/occamy_xilinx.sv.tpl
index d5e319001..ca84c2be4 100644
--- a/hw/occamy/occamy_xilinx.sv.tpl
+++ b/hw/occamy/occamy_xilinx.sv.tpl
@@ -41,8 +41,23 @@ import ${name}_pkg::*;
   inout  logic        i2c_scl_io,
   // `SPI Host` Interface
   output logic        spim_sck_o,
+  output logic        spim_sck_en_o,
   output logic [1:0]  spim_csb_o,
-  inout  logic [3:0]  spim_sd_io,
+  output logic [1:0]  spim_csb_en_o,
+  output logic [3:0]  spim_sd_o,
+  input        [3:0]  spim_sd_i,
+  output logic [3:0]  spim_sd_en_o,
+<% 
+  spi_slave_present = any(periph["name"] == "spi_slave" for periph in occamy_cfg["peripherals"]["axi_lite_peripherals"])
+%>
+% if spi_slave_present: 
+  // `SPI Slave` for Debugging Purposes
+  input  logic        spis_sck_i,
+  input  logic        spis_csb_i,
+  output logic [3:0]  spis_sd_o,
+  output logic [3:0]  spis_sd_en_o,
+  input  logic [3:0]  spis_sd_i,
+% endif
 
   input  logic [11:0] ext_irq_i,
 
@@ -53,7 +68,7 @@ import ${name}_pkg::*;
   output logic [47:0] bootrom_addr_o,
   input  logic [31:0] bootrom_data_i,
 
-  // SPM / SRAM as the main memory
+  // HBM Port
   ${soc_wide_xbar.out_spm_wide.emit_flat_master_port("m_axi_ram")}
 );
 
diff --git a/target/rtl/test/testharness.sv.tpl b/target/rtl/test/testharness.sv.tpl
index 31c4120ae..4101f1a55 100644
--- a/target/rtl/test/testharness.sv.tpl
+++ b/target/rtl/test/testharness.sv.tpl
@@ -11,7 +11,7 @@ module testharness import occamy_pkg::*; (
 
   // verilog_lint: waive explicit-parameter-storage-type
   localparam RTCTCK = 30.518us; // 32.768 kHz
-  localparam SPITCK = 15.15ns; // SPI clock
+  localparam SPITCK = 16ns; // SPI clock
 
   logic rtc_i;