diff --git a/target/rtl/cfg/cluster_cfg/snax_KUL_cluster.hjson b/target/rtl/cfg/cluster_cfg/snax_KUL_cluster.hjson index 3cf0499cb..2bc25a532 100644 --- a/target/rtl/cfg/cluster_cfg/snax_KUL_cluster.hjson +++ b/target/rtl/cfg/cluster_cfg/snax_KUL_cluster.hjson @@ -186,81 +186,47 @@ // SNAX Streamer Templates snax_streamer_gemmX_streamer_template :{ - temporal_addrgen_unit_params: { - loop_dim: [6, 3, 3, 3, 3], - share_temp_addr_gen_loop_bounds: false, - } - - fifo_reader_params: { - fifo_width: [512, 512], + data_reader_params: { + spatial_bounds: [[8], [8]], + temporal_dim: [6, 3], + num_channel: [8, 8], fifo_depth: [2, 2], - } - - fifo_writer_params: { - fifo_width: [512], - fifo_depth: [2], - } - - fifo_reader_writer_params: { - fifo_width: [2048], - fifo_depth: [2], - } - - data_reader_params:{ - tcdm_ports_num: [8, 8], - spatial_bounds: [[8, 8], [8, 8]], - spatial_dim: [2, 2], - element_width: [8, 8], - } + }, data_writer_params:{ - tcdm_ports_num: [8], - spatial_bounds: [[8, 8]], - spatial_dim: [2], - element_width: [8], - } + spatial_bounds: [[8]], + temporal_dim: [3], + num_channel: [8], + fifo_depth: [2], + }, data_reader_writer_params:{ - tcdm_ports_num: [32], - spatial_bounds: [[8, 8]], - spatial_dim: [2], - element_width: [32], - } + spatial_bounds: [[32], [32]], + temporal_dim: [3, 3], + num_channel: [32, 32], + fifo_depth: [2, 2], + }, - stationarity: [0,0,0,0,0] + snax_library_name: "streamer-gemm-conv-simd", }, // SNAX Streamer Templates snax_data_reshuffler_streamer_template :{ - temporal_addrgen_unit_params: { - loop_dim: [5, 3], - share_temp_addr_gen_loop_bounds: false, - } - - fifo_reader_params: { - fifo_width: [512], - fifo_depth: [2], - } - - fifo_writer_params: { - fifo_width: [512], - fifo_depth: [2], - } - - data_reader_params:{ - tcdm_ports_num: [8], + data_reader_params: { spatial_bounds: [[8]], - spatial_dim: [1], - element_width: [64], - } + temporal_dim: [5], + num_channel: [8], + fifo_depth: [2], + }, data_writer_params:{ - tcdm_ports_num: [8], spatial_bounds: [[8]], - spatial_dim: [1], - element_width: [64], - } + temporal_dim: [3], + num_channel: [8], + fifo_depth: [2], + }, + + snax_library_name: "data-reshuffler", - stationarity: [0,0] } } diff --git a/target/rtl/cfg/cluster_cfg/snax_KUL_xdma_cluster.hjson b/target/rtl/cfg/cluster_cfg/snax_KUL_xdma_cluster.hjson index 1ff83e7a2..caa24ac48 100644 --- a/target/rtl/cfg/cluster_cfg/snax_KUL_xdma_cluster.hjson +++ b/target/rtl/cfg/cluster_cfg/snax_KUL_xdma_cluster.hjson @@ -169,81 +169,27 @@ // SNAX Streamer Templates snax_streamer_gemmX_streamer_template :{ - temporal_addrgen_unit_params: { - loop_dim: [6, 3, 3, 3, 3], - share_temp_addr_gen_loop_bounds: false, - } - - fifo_reader_params: { - fifo_width: [512, 512], + data_reader_params: { + spatial_bounds: [[8], [8]], + temporal_dim: [6, 3], + num_channel: [8, 8], fifo_depth: [2, 2], - } - - fifo_writer_params: { - fifo_width: [512], - fifo_depth: [2], - } - - fifo_reader_writer_params: { - fifo_width: [2048], - fifo_depth: [2], - } - - data_reader_params:{ - tcdm_ports_num: [8, 8], - spatial_bounds: [[8, 8], [8, 8]], - spatial_dim: [2, 2], - element_width: [8, 8], - } + }, data_writer_params:{ - tcdm_ports_num: [8], - spatial_bounds: [[8, 8]], - spatial_dim: [2], - element_width: [8], - } - - data_reader_writer_params:{ - tcdm_ports_num: [32], - spatial_bounds: [[8, 8]], - spatial_dim: [2], - element_width: [32], - } - - stationarity: [0,0,0,0,0] - }, - // SNAX Streamer Templates - snax_data_reshuffler_streamer_template :{ - - temporal_addrgen_unit_params: { - loop_dim: [5, 3], - share_temp_addr_gen_loop_bounds: false, - } - - fifo_reader_params: { - fifo_width: [512], - fifo_depth: [2], - } - - fifo_writer_params: { - fifo_width: [512], - fifo_depth: [2], - } - - data_reader_params:{ - tcdm_ports_num: [8], spatial_bounds: [[8]], - spatial_dim: [1], - element_width: [64], - } + temporal_dim: [3], + num_channel: [8], + fifo_depth: [2], + }, - data_writer_params:{ - tcdm_ports_num: [8], - spatial_bounds: [[8]], - spatial_dim: [1], - element_width: [64], - } + data_reader_writer_params:{ + spatial_bounds: [[32], [32]], + temporal_dim: [3, 3], + num_channel: [32, 32], + fifo_depth: [2, 2], + }, - stationarity: [0,0] + snax_library_name: "streamer-gemm-conv-simd", } } diff --git a/target/rtl/cfg/cluster_cfg/snax_alu_cluster.hjson b/target/rtl/cfg/cluster_cfg/snax_alu_cluster.hjson index c224876b0..c9074da40 100644 --- a/target/rtl/cfg/cluster_cfg/snax_alu_cluster.hjson +++ b/target/rtl/cfg/cluster_cfg/snax_alu_cluster.hjson @@ -150,35 +150,20 @@ // SNAX Streamer Templates snax_alu_streamer_template :{ - temporal_addrgen_unit_params: { - loop_dim: [1], - share_temp_addr_gen_loop_bounds: true, - } - - fifo_reader_params: { - fifo_width: [256, 256], - fifo_depth: [8, 8], - } - - fifo_writer_params: { - fifo_width: [256], - fifo_depth: [8], - } - - data_reader_params:{ - tcdm_ports_num: [4, 4], + data_reader_params: { spatial_bounds: [[4], [4]], - spatial_dim: [1,1], - element_width: [64,64], - } + temporal_dim: [1, 1], + num_channel: [4, 4], + fifo_depth: [8, 8], + }, data_writer_params:{ - tcdm_ports_num: [4], spatial_bounds: [[4]], - spatial_dim: [1], - element_width: [64], - } + temporal_dim: [1], + num_channel: [4], + fifo_depth: [8], + }, - stationarity: [0,0,0] + snax_library_name: "snax-alu", } } diff --git a/target/rtl/cfg/cluster_cfg/snax_hypercorex_cluster.hjson b/target/rtl/cfg/cluster_cfg/snax_hypercorex_cluster.hjson index 896e9beb9..a40653bb6 100644 --- a/target/rtl/cfg/cluster_cfg/snax_hypercorex_cluster.hjson +++ b/target/rtl/cfg/cluster_cfg/snax_hypercorex_cluster.hjson @@ -158,35 +158,20 @@ // SNAX Streamer Templates snax_hypercorex_streamer_template :{ - temporal_addrgen_unit_params: { - loop_dim: [2,2,2,2,2,2,2], - share_temp_addr_gen_loop_bounds: false, - } - - fifo_reader_params: { - fifo_width: [64,64,512,512,512], - fifo_depth: [4,4,4,4,4], - } - - fifo_writer_params: { - fifo_width: [64, 512], - fifo_depth: [4, 4], - } - - data_reader_params:{ - tcdm_ports_num: [1,1,8,8,8], - spatial_bounds: [[1],[1],[8],[8],[8]], - spatial_dim: [1,1,1,1,1], - element_width: [64,64,64,64,64], - } + data_reader_params: { + spatial_bounds: [[1], [1], [8], [8], [8]], + temporal_dim: [2, 2, 2, 2, 2], + num_channel: [1, 1, 8, 8, 8], + fifo_depth: [4, 4, 4, 4, 4], + }, data_writer_params:{ - tcdm_ports_num: [1,8], - spatial_bounds: [[1],[8]], - spatial_dim: [1,1], - element_width: [64,64], - } + spatial_bounds: [[1], [8]], + temporal_dim: [2, 2], + num_channel: [1, 8], + fifo_depth: [4, 4], + }, - stationarity: [0,0,0,0,0,0,0] + snax_library_name: "hypercorex", } } diff --git a/target/rtl/cfg/cluster_cfg/snax_xdma_cluster.hjson b/target/rtl/cfg/cluster_cfg/snax_xdma_cluster.hjson deleted file mode 100644 index bdeaf97b5..000000000 --- a/target/rtl/cfg/cluster_cfg/snax_xdma_cluster.hjson +++ /dev/null @@ -1,118 +0,0 @@ -{ - cluster: { - name: "snax_xdma_cluster", - bender_target: ["snax_xdma_cluster"], - boot_addr: 4096, // 0x1000 - cluster_base_addr: 268435456, // 0x10000000 - cluster_base_offset: 262144, // 256KB - cluster_base_hartid: 1, - addr_width: 48, - data_width: 64, - user_width: 3, // clog2(total number of clusters) - tcdm: { - size: 128, // 128 kiB - banks: 32, - }, - cluster_periph_size: 64, // kB - zero_mem_size: 64, // kB - dma_data_width: 512, - dma_axi_req_fifo_depth: 16, - dma_req_fifo_depth: 8, - narrow_trans: 4, - wide_trans: 32, - dma_user_width: 1, - // We don't need Snitch debugging in Occamy - enable_debug: false, - // We don't need Snitch (core-internal) virtual memory support - vm_support: false, - // Memory configuration inputs - sram_cfg_expose: true, - sram_cfg_fields: { - ema: 3, - emaw: 2, - emas: 1 - }, - // Timing parameters - timing: { - lat_comp_fp32: 2, - lat_comp_fp64: 3, - lat_comp_fp16: 1, - lat_comp_fp16_alt: 1, - lat_comp_fp8: 1, - lat_comp_fp8_alt: 1, - lat_noncomp: 1, - lat_conv: 2, - lat_sdotp: 3, - fpu_pipe_config: "BEFORE" - narrow_xbar_latency: "CUT_ALL_PORTS", - wide_xbar_latency: "CUT_ALL_PORTS", - // Isolate the core. - register_core_req: true, - register_core_rsp: true, - register_offload_req: true, - register_offload_rsp: true, - register_fpu_req: true, - register_ext_narrow: false, - register_ext_wide: false - }, - hives: [ - // Hive 0 - { - icache: { - size: 8, // total instruction cache size in kByte - sets: 2, // number of ways - cacheline: 256 // word size in bits - }, - cores: [ - { $ref: "#/dma_core_template" } - ] - } - ], - }, - dram: { - // 0x8000_0000 - address: 2147483648, - // 0x8000_0000 - length: 2147483648 - }, - peripherals: { - clint: { - // 0xffff_0000 - address: 4294901760, - // 0x0000_1000 - length: 4096 - }, - }, - - dma_core_template: { - isa: "rv32ima", - snax_xdma_cfg: { - bender_target: ["snax_xdma"], - reader_buffer: 8, - writer_buffer: 8, - reader_agu_spatial_bounds: "8", - reader_agu_temporal_dimension: 6, - writer_agu_spatial_bounds: "8", - writer_agu_temporal_dimension: 6, - HasTransposer: 3, - HasVerilogMemset: 1, - HasMaxPool: 2 - } - xdma: true, - xssr: false, - xfrep: false - xf16: false, - xf16alt: false, - xf8: false, - xf8alt: false, - xfdotp: false, - xfvec: false, - num_int_outstanding_loads: 1, - num_int_outstanding_mem: 4, - num_fp_outstanding_loads: 4, - num_fp_outstanding_mem: 4, - num_sequencer_instructions: 16, - num_dtlb_entries: 1, - num_itlb_entries: 1, - }, -}