From a1b6991a88da37ee1829fe22546f6785bf5b7e8b Mon Sep 17 00:00:00 2001 From: Ayoub Jalali Date: Thu, 30 Mar 2023 12:07:42 +0200 Subject: [PATCH 1/2] CVXIF : Update base vseq for more control on decode & the response & remove some cus instruction from the vseq Signed-off-by: Ayoub Jalali --- .../uvme/cvxif_vseq/uvme_cvxif_base_vseq.sv | 57 +++----- cva6/env/uvme/cvxif_vseq/uvme_cvxif_vseq.sv | 123 ++++++++++++------ 2 files changed, 102 insertions(+), 78 deletions(-) diff --git a/cva6/env/uvme/cvxif_vseq/uvme_cvxif_base_vseq.sv b/cva6/env/uvme/cvxif_vseq/uvme_cvxif_base_vseq.sv index b41c2d8853..3f08d6c87e 100644 --- a/cva6/env/uvme/cvxif_vseq/uvme_cvxif_base_vseq.sv +++ b/cva6/env/uvme/cvxif_vseq/uvme_cvxif_base_vseq.sv @@ -58,46 +58,31 @@ function string uvme_cvxif_base_vseq_c::decode(input logic [31:0] instr); bit [4:0] rs1 = instr [19:15]; bit [4:0] rs2 = instr [24:20]; - if (opcode != custom3 ) begin - return ("illegal"); - end - else begin + if (opcode == custom3) begin if (func3 == 0) begin - if (rd == 0) begin - if (func7 == 0 && rs1 == 0 && rs2 == 0) begin - return ("CUS_NOP"); - end - if (func7 == 7'b1000000 && rs2 == 0) begin - return ("CUS_EXC"); - end - if (func7 == 7'b0100000 && rs1 == 0 && rs2 == 0) begin - return ("CUS_NOP_EXC"); - end - if (func7 == 7'b1100000 && rs1 == 0 && rs2 == 0) begin - return ("CUS_ISS_EXC"); - end + if (func7 == 7'b0000000 && rd != 0) begin + return ("CUS_ADD"); end - else begin - if (func7 == 0) begin - return ("CUS_ADD"); - end - if (func2==2'b01) begin - return ("CUS_ADD_RS3"); - end - if (func7==7'b0001000) begin - return ("CUS_ADD_MULTI"); - end - if (func7==7'b0000010) begin - return ("CUS_M_ADD"); - end - if (func7==7'b0000110) begin - return ("CUS_S_ADD"); - end + if (func7 == 7'b0001000 && rd != 0) begin + return ("CUS_ADD_MULTI"); + end + if (func2 == 2'b01 && rd != 0) begin + return ("CUS_ADD_RS3"); + end + if (func7 == 7'b0000010 && rd != 0) begin + return ("CUS_M_ADD"); + end + if (func7 == 7'b0000110 && rd != 0) begin + return ("CUS_S_ADD"); + end + if (func7 == 7'b0000000 && rd == 0 && rs1 == 0 && rs2 == 0) begin + return ("CUS_NOP"); + end + if (func7 == 7'b1000000 && rd == 0 && rs2[4:1] == 0) begin + return ("CUS_EXC"); end end - else begin - return ("illegal"); - end + return ("ILLEGAL"); end endfunction diff --git a/cva6/env/uvme/cvxif_vseq/uvme_cvxif_vseq.sv b/cva6/env/uvme/cvxif_vseq/uvme_cvxif_vseq.sv index c5d0e01449..522ab102d0 100644 --- a/cva6/env/uvme/cvxif_vseq/uvme_cvxif_vseq.sv +++ b/cva6/env/uvme/cvxif_vseq/uvme_cvxif_vseq.sv @@ -116,15 +116,33 @@ task uvme_cvxif_vseq_c::do_issue_resp(); resp_item.issue_resp.dualread = 0; resp_item.issue_resp.exc = 0; case (instr) inside - "CUS_ADD", "CUS_ADD_MULTI", "CUS_ADD_RS3" : begin - resp_item.issue_resp.writeback = 1; - resp_item.issue_resp.accept = 1; + "CUS_ADD", "CUS_ADD_MULTI" : begin + if (req_item.issue_req.rs_valid == 2'b11) begin + resp_item.issue_resp.writeback = 1; + resp_item.issue_resp.accept = 1; + end + else begin + resp_item.issue_resp.writeback = 0; + resp_item.issue_resp.accept = 1; + resp_item.issue_resp.exc = 1; + end + end + "CUS_ADD_RS3" : begin + if (req_item.issue_req.rs_valid == 3'b111) begin + resp_item.issue_resp.writeback = 1; + resp_item.issue_resp.accept = 1; + end + else begin + resp_item.issue_resp.writeback = 0; + resp_item.issue_resp.accept = 1; + resp_item.issue_resp.exc = 1; + end end - "CUS_EXC", "CUS_NOP" : begin + "CUS_NOP" : begin resp_item.issue_resp.writeback = 0; resp_item.issue_resp.accept = 1; end - "CUS_NOP_EXC", "CUS_ISS_EXC" : begin + "CUS_EXC" : begin resp_item.issue_resp.writeback = 0; resp_item.issue_resp.accept = 1; resp_item.issue_resp.exc = 1; @@ -136,7 +154,8 @@ task uvme_cvxif_vseq_c::do_issue_resp(); end else begin resp_item.issue_resp.writeback = 0; - resp_item.issue_resp.accept = 0; + resp_item.issue_resp.accept = 1; + resp_item.issue_resp.exc = 1; end end "CUS_S_ADD" : begin @@ -146,11 +165,14 @@ task uvme_cvxif_vseq_c::do_issue_resp(); end else begin resp_item.issue_resp.writeback = 0; - resp_item.issue_resp.accept = 0; + resp_item.issue_resp.accept = 1; + resp_item.issue_resp.exc = 1; end end endcase `uvm_info(info_tag, $sformatf("instr = %s", instr), UVM_LOW); + `uvm_info(info_tag, $sformatf("Response : accept = %h writeback = %h dualwrite = %h dualread = %h exc = %h", + resp_item.issue_resp.accept, resp_item.issue_resp.writeback, resp_item.issue_resp.dualwrite, resp_item.issue_resp.dualread, resp_item.issue_resp.exc), UVM_LOW); endtask @@ -158,12 +180,12 @@ task uvme_cvxif_vseq_c::do_result_resp(); //result_resp if (!req_item.commit_req.commit_kill && req_item.commit_valid) begin - resp_item.result_valid=1; - resp_item.result.id=req_item.commit_req.id; - resp_item.result.rd=req_item.issue_req.instr[11:7]; - resp_item.result.we=resp_item.issue_resp.writeback; - resp_item.result.data=0; - resp_item.result_ready=req_item.result_ready; + resp_item.result_valid = 1; + resp_item.result.id = req_item.commit_req.id; + resp_item.result.rd = req_item.issue_req.instr[11:7]; + resp_item.result.we = resp_item.issue_resp.writeback; + resp_item.result.data = 0; + resp_item.result_ready = req_item.result_ready; do_instr_result(); if (cfg.instr_delayed) begin cfg.randomize(rnd_delay); @@ -174,13 +196,13 @@ task uvme_cvxif_vseq_c::do_result_resp(); end end else begin - resp_item.result_valid=0; - resp_item.result.id=0; - resp_item.result.exc=0; - resp_item.result.data=0; - resp_item.result.rd=0; - resp_item.result.we=0; - resp_item.result.exccode=0; + resp_item.result_valid = 0; + resp_item.result.id = 0; + resp_item.result.exc = 0; + resp_item.result.data = 0; + resp_item.result.rd = 0; + resp_item.result.we = 0; + resp_item.result.exccode = 0; resp_item.rnd_delay = 0; end @@ -189,44 +211,61 @@ endtask task uvme_cvxif_vseq_c::do_instr_result(); //result response depend on instruction - resp_item.result.exc=0; - resp_item.result.exccode=0; + resp_item.result.exc = 0; + resp_item.result.exccode = 0; cfg.instr_delayed = 0; case (instr) "CUS_ADD": begin - resp_item.result.data=req_item.issue_req.rs[0] + req_item.issue_req.rs[1]; + if (req_item.issue_req.rs_valid == 2'b11) + resp_item.result.data = req_item.issue_req.rs[0] + req_item.issue_req.rs[1]; + else begin + resp_item.result.exc = 1; + resp_item.result.exccode[5:0] = 6'b000010; //Exception Illegal instruction + `uvm_info(info_tag, $sformatf("Exception Illegal instruction -> EXCCODE: %d", resp_item.result.exccode), UVM_LOW); + end end "CUS_ADD_MULTI": begin - resp_item.result.data=req_item.issue_req.rs[0] + req_item.issue_req.rs[1]; - cfg.instr_delayed = 1; - end - "CUS_NOP_EXC": begin - cfg.instr_delayed = 1; + if (req_item.issue_req.rs_valid == 2'b11) begin + resp_item.result.data = req_item.issue_req.rs[0] + req_item.issue_req.rs[1]; + cfg.instr_delayed = 1; + end + else begin + resp_item.result.exc = 1; + resp_item.result.exccode[5:0] = 6'b000010; //Exception Illegal instruction + `uvm_info(info_tag, $sformatf("Exception Illegal instruction -> EXCCODE: %d", resp_item.result.exccode), UVM_LOW); + end end "CUS_EXC": begin - resp_item.result.exc=1; - resp_item.result.exccode[4:0] = req_item.issue_req.instr[19:15]; - resp_item.result.exccode[5] = req_item.issue_req.instr[20]; - `uvm_info(info_tag, $sformatf("EXCCODE: %d", resp_item.result.exccode), UVM_HIGH); - end - "CUS_ISS_EXC": begin - cfg.instr_delayed = 1; resp_item.result.exc = 1; resp_item.result.exccode[4:0] = req_item.issue_req.instr[19:15]; - resp_item.result.exccode[5] = req_item.issue_req.instr[20]; - `uvm_info(info_tag, $sformatf("EXCCODE: %d", resp_item.result.exccode), UVM_HIGH); + resp_item.result.exccode[5] = req_item.issue_req.instr[20]; + `uvm_info(info_tag, $sformatf("EXCCODE: %d", resp_item.result.exccode), UVM_LOW); end "CUS_ADD_RS3": begin - resp_item.result.data=req_item.issue_req.rs[0] + req_item.issue_req.rs[1] + ( cvxif_pkg::X_NUM_RS == 3 ? req_item.issue_req.rs[2] : 0); + if (req_item.issue_req.rs_valid == 3'b111) + resp_item.result.data = req_item.issue_req.rs[0] + req_item.issue_req.rs[1] + req_item.issue_req.rs[2]; + else begin + resp_item.result.exc = 1; + resp_item.result.exccode[5:0] = 6'b000010; //Exception Illegal instruction + `uvm_info(info_tag, $sformatf("Exception Illegal instruction -> EXCCODE: %d", resp_item.result.exccode), UVM_LOW); + end end "CUS_M_ADD": begin - if (req_item.issue_req.mode == 2'b11) begin - resp_item.result.data=req_item.issue_req.rs[0] + req_item.issue_req.rs[1]; + if (req_item.issue_req.mode == 2'b11 && req_item.issue_req.rs_valid == 2'b11) + resp_item.result.data = req_item.issue_req.rs[0] + req_item.issue_req.rs[1]; + else begin + resp_item.result.exc = 1; + resp_item.result.exccode[5:0] = 6'b000010; //Exception Illegal instruction + `uvm_info(info_tag, $sformatf("Exception Illegal instruction -> EXCCODE: %d", resp_item.result.exccode), UVM_LOW); end end "CUS_S_ADD": begin - if (req_item.issue_req.mode == 2'b01 || req_item.issue_req.mode == 2'b11) begin - resp_item.result.data=req_item.issue_req.rs[0] + req_item.issue_req.rs[1]; + if (req_item.issue_req.mode == 2'b01 && req_item.issue_req.rs_valid == 2'b11) + resp_item.result.data = req_item.issue_req.rs[0] + req_item.issue_req.rs[1]; + else begin + resp_item.result.exc = 1; + resp_item.result.exccode[5:0] = 6'b000010; //Exception Illegal instruction + `uvm_info(info_tag, $sformatf("Exception Illegal instruction -> EXCCODE: %d", resp_item.result.exccode), UVM_LOW); end end endcase From 3fe9e41ab4a94d2acc87f2422679ebf0c2a9ee74 Mon Sep 17 00:00:00 2001 From: Ayoub Jalali Date: Thu, 30 Mar 2023 12:08:09 +0200 Subject: [PATCH 2/2] CVXIF : Drive rs_valid information Signed-off-by: Ayoub Jalali --- lib/uvm_agents/uvma_cvxif/src/comps/uvma_cvxif_mon.sv | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/uvm_agents/uvma_cvxif/src/comps/uvma_cvxif_mon.sv b/lib/uvm_agents/uvma_cvxif/src/comps/uvma_cvxif_mon.sv index f950dd86f1..9191bab68a 100644 --- a/lib/uvm_agents/uvma_cvxif/src/comps/uvma_cvxif_mon.sv +++ b/lib/uvm_agents/uvma_cvxif/src/comps/uvma_cvxif_mon.sv @@ -136,6 +136,7 @@ task uvma_cvxif_mon_c::run_phase(uvm_phase phase); issue_id_lst[i] = i; req_tr.issue_valid = cntxt.vif.cvxif_req_i.x_issue_valid; req_tr.issue_req.instr = cntxt.vif.cvxif_req_i.x_issue_req.instr; + req_tr.issue_req.rs_valid = cntxt.vif.cvxif_req_i.x_issue_req.rs_valid; req_tr.issue_req.id = cntxt.vif.cvxif_req_i.x_issue_req.id; req_tr.issue_req.mode = cntxt.vif.cvxif_req_i.x_issue_req.mode; req_tr.issue_ready = cntxt.vif.cvxif_resp_o.x_issue_ready;