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[BUG] [ARC SEM] Memory Read Protection Violation from Secure MPU on exit from interrupt #331
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Hi @jzbydniewski, thank you for notifying to us about your issue of the CPU exception. We will add it to our queue and look into incorporating a fix. |
laroche
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This moves the MQTT Mutual Auth Demo under FreeRTOS-Plus/Demo/coreMQTT_Windows_Simulator/MQTT_Mutual_Auth The project files such as WIN32.vcxproj and WIN32.vcxproj.filters are updated to point to the sources and includes from the coreMQTT submodule. No changes are made to the actual code. Only paths are updated. Co-authored-by: Muneeb Ahmed <[email protected]> Co-authored-by: SarenaAWS <[email protected]> Co-authored-by: leegeth <[email protected]>
vishwamartur
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Related to FreeRTOS#331 Fix the Memory Read Protection Violation from Secure MPU exception on exit from interrupt. * Add code to store SEC_STAT.IRM bit in INTERRUPT_PROLOGUE macro. * Add code to restore SEC_STAT.IRM bit in INTERRUPT_EPILOGUE macro. * Modify `portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s` to include the changes in the interrupt entry/exit macros. --- For more details, open the [Copilot Workspace session](https://copilot-workspace.githubnext.com/FreeRTOS/FreeRTOS-Kernel/issues/331?shareId=XXXX-XXXX-XXXX-XXXX).
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Related to FreeRTOS#331 Fix the Memory Read Protection Violation from Secure MPU exception on exit from interrupt. * Add `lr r3, [0x09] /* store SEC_STAT.IRM */` and `and r3, r3, 0x8` before `PUSH r3` in `EXCEPTION_PROLOGUE` and `INTERRUPT_PROLOGUE`. * Add `POP r3 /* restore SEC_STAT.IRM */` and `sflag r3` before `POP r30` in `EXCEPTION_EPILOGUE` and `INTERRUPT_EPILOGUE`.
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What I observe is that in some circumstances (it started appearing after enabling few more interrupts and threads) CPU ends up catching Memory Read Protection Violation from Secure MPU exception on exit from interrupt in arc_support.s
portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s
519: rtie
Contents of some debug registers once in the exception handler:
Debugging with gdb reveals that SEC_STAT.IRM bit is being reset to 0 after call to dispatcher from interrupt context
portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s
207: bl dispatcher /* r0->pxCurrentTCB */
After IRM is set to 0, the exit from interrupt (RTIE instruction) results in mode switch from secure kernel to normal kernel mode. In my case all memory is marked in MPU as “secure” so this results in CPU exception.
I can see that a similar sounding bug was raised for Zephyr and fixed:
zephyrproject-rtos/zephyr#18725
I tried applying a similar fix for FreeRTOS and the following changes in interrupt entry/exit macros resolve my issue:
arc_asm_common.h from https://github.com/foss-for-synopsys-dwc-arc-processors/embarc_bsp/blob/topic-freertos-demo/include/arc/v2/arc_asm_common.h
[…]
Please note this is simplified fix as the IRM is stored/restored on interrupt entry/exit. I suspect that proper fix would do that on task context store/restore.
Compiler: Synopsys ARC GCC 2020.03, but it seems irrelevant
Platform: Synopsys ARC SEM
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