diff --git a/src/gallia/transports/_ctypes_vector_xl_wrapper.py b/src/gallia/transports/_ctypes_vector_xl_wrapper.py
index 1230f77bd..d69c577c6 100644
--- a/src/gallia/transports/_ctypes_vector_xl_wrapper.py
+++ b/src/gallia/transports/_ctypes_vector_xl_wrapper.py
@@ -26,8 +26,7 @@
 
 
 class FlexRayCtypesBackend:
-    def __init__(self, channel_mask: int, port_handle: int, tx_sleep_time: float) -> None:
-        self.tx_sleep_time = tx_sleep_time
+    def __init__(self, channel_mask: int, port_handle: int) -> None:
         self.channel_mask = channel_mask
         self.port_handle = port_handle
         self.queue: asyncio.Queue[_ctypes_vector_xl.XL_FR_RX_FRAME_EV] = asyncio.Queue()
@@ -38,7 +37,6 @@ def __init__(self, channel_mask: int, port_handle: int, tx_sleep_time: float) ->
     def create(
         cls,
         channel_no: int | None,
-        tx_sleep_time: float = 0.05,
         rx_queue_size: int = 0x2000,
     ) -> Self:
         cls._enable_vector_license()
@@ -54,7 +52,6 @@ def create(
         return cls(
             channel_mask=channel_mask,
             port_handle=port_handle,
-            tx_sleep_time=tx_sleep_time,
         )
 
     def set_configuration(self, config: _ctypes_vector_xl.XLfrClusterConfig) -> None:
@@ -301,8 +298,6 @@ async def transmit(self, slot_id: int, data: bytes) -> None:
             ctypes.c_ubyte * _ctypes_vector_xl.XL_FR_MAX_DATA_LENGTH
         ).from_buffer_copy(data)
 
-        await asyncio.sleep(self.tx_sleep_time)
-
         await asyncio.to_thread(
             _ctypes_vector_xl.xlFrTransmit,
             self.port_handle,
diff --git a/src/gallia/transports/flexray_vector.py b/src/gallia/transports/flexray_vector.py
index d62e4a5c8..6c184fded 100644
--- a/src/gallia/transports/flexray_vector.py
+++ b/src/gallia/transports/flexray_vector.py
@@ -22,7 +22,6 @@
 
 class RawFlexRayConfig(BaseModel):
     rx_queue_size: int = 0x20000
-    tx_sleep_time: float = 0.05
     channel_no: int | None = None
 
     @field_validator(
@@ -56,7 +55,6 @@ def __init__(self, target: TargetURI) -> None:
         self.backend = _ctypes_vector_xl_wrapper.FlexRayCtypesBackend.create(
             channel_no=self.config.channel_no,
             rx_queue_size=self.config.rx_queue_size,
-            tx_sleep_time=self.config.tx_sleep_time,
         )
         self.backend.start_queue()
 
@@ -141,6 +139,7 @@ class FlexrayTPLegacyConfig(BaseModel):
     payload_rx_end_index: int
     fc_block_size: int = 0xFF
     fc_separation_time: int = 0x04
+    tx_sleep_time: float = 0.05
 
     @field_validator(
         "src_slot_id",
@@ -379,6 +378,13 @@ async def write_unsafe(
             )
 
             await self.write_tp_frame(cf_frame)
+
+            # XXX: FlexRay has a defined schedule.
+            # In the best case, we get notified that our
+            # frame has been written to the bus. We do
+            # not have this information, so we sleep for
+            # a configurable time frame…
+            await asyncio.sleep(self.config.tx_sleep_time)
             counter = (counter + 1) & 0x0F
 
         logger.debug("wrote data: %s", data.hex())