From 38c1e32240dd76c350d9f6d2ef09a22d2832b1dc Mon Sep 17 00:00:00 2001
From: Andrew <anolte512@gmail.com>
Date: Tue, 2 Apr 2024 23:14:28 -0400
Subject: [PATCH] package updates

---
 package.json | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/package.json b/package.json
index 69de689..4c686ff 100644
--- a/package.json
+++ b/package.json
@@ -1,16 +1,16 @@
 {
-  "name": "veriloghdl",
-  "displayName": "Verilog-HDL/SystemVerilog/Bluespec SystemVerilog",
-  "description": "Verilog-HDL/SystemVerilog/Bluespec SystemVerilog support for VS Code",
-  "version": "1.13.5",
-  "publisher": "mshr-h",
-  "homepage": "https://github.com/mshr-h/vscode-verilog-hdl-support",
+  "name": "vscode-system-verilog",
+  "displayName": "vscode-system-verilog",
+  "description": "SystemVerilog, Verilog, and VHDL support for VS Code",
+  "version": "0.9.0",
+  "publisher": "AndrewNolte",
+  "homepage": "https://github.com/AndrewNolte/vscode-verilog",
   "repository": {
     "type": "git",
-    "url": "https://github.com/mshr-h/vscode-verilog-hdl-support.git"
+    "url": "https://github.com/AndrewNolte/vscode-verilog.git"
   },
   "bugs": {
-    "url": "https://github.com/mshr-h/vscode-verilog-hdl-support/issues"
+    "url": "https://github.com/AndrewNolte/vscode-verilog/issues"
   },
   "engines": {
     "vscode": "^1.75.0"