ROACH (Reconfigurable Open Architecture Computing Hardware) is a standalone FPGA processing board.
ROACH is a Virtex5-based upgrade to current CASPER hardware. It merges aspects from the IBOB and BEE2 platforms into a single board. The CX4/XAUI/10GbE interfaces of both are kept, while combining the Z-DOK daughter board interface of the IBOB with the high bandwidth/capacity DRAM memory and standalone usage model of the BEE2. ROACH is a single-FPGA board, dispensing with the on-board inter-FPGA links in favor of 10GbE interfaces for all cross-FPGA communications.
The centrepiece of ROACH is a Xilinx Virtex 5 FPGA (either LX110T for logic-intensive applications, or SX95T for DSP-slice-intensive applications). A separate PowerPC runs Linux and is used to control the board (program the FPGA and allow interfacing between the FPGA "software registers/BRAMs/FIFOs" and external devices using Ethernet).
Two quad data rate (QDR) SRAMs provide high-speed, medium-capacity memory (specifically for doing corner-turns), and one DDR2 DIMM provides slower-speed, high-capacity buffer memory for the FPGA. The PowerPC has an independent DDR2 DIMM in order to boot Linux/BORPH.
The two Z-DOK connectors allow ADC, DAC and other interface cards to be attached to the FPGA, in the same manner as the IBOB allowed (with backwards compatibility for the ADC boards used with the IBOB).
Four CX4 connectors provide a total of 40Gbits/sec bandwidth for connecting ROACH boards together, or connecting them to other XAUI/10GbE-capable devices (such as BEE2 boards, computers with 10GbE NICs and 10GbE switches).
The ROACH architecture can be broken down into 3 major and relatively independent subsystems. A ROACH board consists primarily of the FPGA subsystem, the PowerPC subsystem, and the monitor/management subsystem.
The MonMan subsystem of the ROACH board provides remote power control and system status monitoring. An Actel AFS600 mixed-signal FPGA (U60) implements the core functionality. The Actel FPGA handles the ATX power supply's soft power toggling and monitors the voltage and current draw of key power supplies on the board using on-chip ADCs. It can shut down power to the board in the event of a power supply being out of range. This subsystem is powered from the ATX auxiliary 5V power rail, and thus remains on even after a board powerdown.
Remote access to the Actel FPGA is enabled by the Lantronix XP1001001 XPORT (J28). The XPORT encapsulates serial I/O with the Actel in an Ethernet format, which allows switched-network communication with the FPGA.
The PowerPC subsystem is intended to be the primary command/control mechanism for the ROACH board, along with moderate-bandwidth data I/O with the Xilinx FPGA. Its primary component is the AMCC PowerPC 440EPx embedded processor (U1). The PowerPC's functions are supported by DDR2 DRAM (J8), a Spansion 16x32M flash memory (U42), and a National DP83865 10/100/1000 Ethernet PHY (U58). An Xilinx XC2C256 CPLD (U54) acts as an interface to additional I/O capability for the PowerPC, including a MMC/SD memory card socket (J17).
ROACH is built around the primary FPGA (U15) for its signal processing capabilities. Either a Xilinx Virtex 5 XC5VLX110T or XC5VSX95T can be populated. The FPGA is connected to a number of peripherals and I/O interfaces; high-bandwidth data I/O is accessible via 2 Tyco Z-DOK+ 40-pair host connectors (P5, P7) and 4 CX4 ports for XAUI/10GbE (P3). Memory is available in both DDR2 DRAM (J15) and QDRII+ SRAM (U17, U63).
- FPGA Interfaces
- 2x Z-DOK+ 40 differential pair connectors
- 4x CX4 10Gbps high-speed serial connectors
- 1x QSH 40 differential pair connector
- 16x GPIO
- 4x SMA IO (2x clock-capable)
- FPGA Peripherals
- 2x 2M x 18-bit QDRII+ SRAMs
- 1x DDR2 DRAM DIMM
- CPU
- 1x AMCC PowerPC 440EPx Embedded Processor
- CPU Interfaces
- 1x RS232 DB9 serial port
- 1x 10/100/1000Mbit RJ45 Ethernet
- 1x USB2.0
- 1x MMC/SD card socket
- Monitor and Management
- Temperatures of Xilinx Virtex5, PowerPC and Actel Fusion.
- Voltages of 12V, 5V, 3.3V, 2.5V, 1.8V, 1.5V, 1V and 1.2V aux rails.
- Automated shutdown in the event of over temperature, over orunder voltage with logging of last shutdown event.
- Remote power on/off.
- Separate 100Mbps Ethernet port for independent board control and health monitoring.
- Block Diagram
- Gerbers
A free PADS PCB viewer is available from http://www.mentor.com/products/pcb-system-design/design-flows/pads/pads-pcb-viewer
The details about development progression have been moved to its own dedicated page: ROACH Development.
Production is managed by Mo at Digicom. Send
production-related inquiries to mo at digicom dot org. Production is
grouped into batches, so lead times are variable.
- Getting Started with ROACH
- Latest firmware and software versions
- Initial bringup, configuration, and test process
- ROACH test machine
- UBOOT and kernel update procedure
- Setting up BORPH on ROACH
- ROACH configuration memo (KAT-7 DBE internal memo 008)
- ROACH onboard monitor and management subsystem
- KATCP for remote control over the network
- ZDOK Pin Numbering
- ROACH NFS guide
- ROACH Enclosure/Chassis
- Latest Versions
- ROACH DDR2 Modules
- How to debrick your roach using an open source alternative to OCD commander
- ROACH USB issue and workaround
- RFI Tests
- Sync inputs
- The Roach1 has (at least) two possible sync inputs:
- Via the vertical mount SMA receptacle connectors J12. The signal input to this connector is terminated into 50 ohms and then turned into the LVDS differential pair "GPIO_CLK0_P" and "GPIO_CLK0_N" via an Analog Devices ADCMP605BCPE comparator and enters the FPGA at pins G15/G16.
- Via the vertical mount SMA receptacle connectors J13. The signal input to this connector is terminated into 50 ohms and then turned into the LVDS differential pair "GPIO_CLK1_P" and "GPIO_CLK1_N" via an Analog Devices ADCMP605BCPE comparator and enters the FPGA at pins H14/H15.
- These pins are available in the standard CASPER tools libraries.
- The Roach1 has (at least) two possible sync inputs:
For any ROACH issues, submit questions to the CASPER Mailing List.