From 7b3c2231ef4ad279986f04f06e1b8d49491f87f1 Mon Sep 17 00:00:00 2001 From: gullahmed1 Date: Tue, 12 Sep 2023 12:40:00 +0500 Subject: [PATCH] Resolving store_unit and mmusv32 --- core/mmu_sv32/cva6_mmu_sv32.sv | 2 +- core/store_unit.sv | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/core/mmu_sv32/cva6_mmu_sv32.sv b/core/mmu_sv32/cva6_mmu_sv32.sv index 1bfeb41cc0c..1b4947a1c6a 100644 --- a/core/mmu_sv32/cva6_mmu_sv32.sv +++ b/core/mmu_sv32/cva6_mmu_sv32.sv @@ -390,7 +390,7 @@ module cva6_mmu_sv32 import ariane_pkg::*; #( lsu_dtlb_ppn_o = {{riscv::PLEN-riscv::VLEN{1'b0}},lsu_vaddr_n[riscv::VLEN-1:12]}; end else begin lsu_paddr_o = lsu_vaddr_q[riscv::PLEN-1:0]; - lsu_dtlb_ppn_o = {{$bits(lsu_dtlb_ppn_o)-$bits(lsu_vaddr_n[riscv::VLEN-1:12]){1'b0}},lsu_vaddr_n[riscv::VLEN-1:12]}; + lsu_dtlb_ppn_o = {{2{1'b0}},lsu_vaddr_n[riscv::VLEN-1:12]}; end lsu_valid_o = lsu_req_q; lsu_exception_o = misaligned_ex_q; diff --git a/core/store_unit.sv b/core/store_unit.sv index 95c460de905..f473bf2ace8 100644 --- a/core/store_unit.sv +++ b/core/store_unit.sv @@ -185,7 +185,7 @@ module store_unit import ariane_pkg::*; #( st_be_n = lsu_ctrl_i.be; // don't shift the data if we are going to perform an AMO as we still need to operate on this data st_data_n = instr_is_amo ? lsu_ctrl_i.data[riscv::XLEN-1:0] - : data_align(lsu_ctrl_i.vaddr[2:0], {{64-$bits(lsu_ctrl_i.data){1'b0}},lsu_ctrl_i.data}); + : data_align(lsu_ctrl_i.vaddr[2:0], {{64-riscv::XLEN{1'b0}},lsu_ctrl_i.data}); st_data_size_n = extract_transfer_size(lsu_ctrl_i.operation); // save AMO op for next cycle case (lsu_ctrl_i.operation)