diff --git a/core/include/cv32a6_imac_sv32_config_pkg.sv b/core/include/cv32a6_imac_sv32_config_pkg.sv
index 09d9d24a09..f10df730ef 100644
--- a/core/include/cv32a6_imac_sv32_config_pkg.sv
+++ b/core/include/cv32a6_imac_sv32_config_pkg.sv
@@ -24,7 +24,6 @@ package cva6_config_pkg;
   localparam CVA6ConfigZcmpExtEn = 0;
   localparam CVA6ConfigAExtEn = 1;
   localparam CVA6ConfigHExtEn = 0;  // always disabled
-  localparam CVA6ConfigBExtEn = 1;
   localparam CVA6ConfigVExtEn = 0;
   localparam CVA6ConfigRVZiCond = 0;
 
@@ -90,7 +89,7 @@ package cva6_config_pkg;
       XF16ALT: bit'(CVA6ConfigF16AltEn),
       XF8: bit'(CVA6ConfigF8En),
       RVA: bit'(CVA6ConfigAExtEn),
-      RVB: bit'(CVA6ConfigBExtEn),
+      RVB: bit'(1),
       ZKN: bit'(1),
       RVV: bit'(CVA6ConfigVExtEn),
       RVC: bit'(CVA6ConfigCExtEn),
diff --git a/verif/sim/cva6.py b/verif/sim/cva6.py
index 42499dd1bd..a2a37654f2 100644
--- a/verif/sim/cva6.py
+++ b/verif/sim/cva6.py
@@ -877,10 +877,10 @@ def load_config(args, cwd):
     if base in ("cv64a6_imafdch_sv39", "cv64a6_imafdch_sv39_wb"):
       args.mabi = "lp64d"
       args.isa  = "rv64gch_zba_zbb_zbs_zbc"
-    elif base in ("cv64a6_imafdc_sv39_hpdcache", "cv64a6_imafdc_sv39_wb"):
+    elif base in ("cv64a6_imafdc_sv39_wb"):
       args.mabi = "lp64d"
       args.isa  = "rv64gc_zba_zbb_zbs_zbc"
-    elif base in ("cv64a6_imafdc_sv39"):
+    elif base in ("cv64a6_imafdc_sv39", "cv64a6_imafdc_sv39_hpdcache"):
       args.mabi = "lp64d"
       args.isa  = "rv64gc_zba_zbb_zbs_zbc_zbkb"
     elif base == "cv32a60x":
diff --git a/verif/tests/testlist_riscv-arch-test-cv64a6_imafdc_sv39.yaml b/verif/tests/testlist_riscv-arch-test-cv64a6_imafdc_sv39.yaml
index 6aa4701e64..1550d1f22c 100644
--- a/verif/tests/testlist_riscv-arch-test-cv64a6_imafdc_sv39.yaml
+++ b/verif/tests/testlist_riscv-arch-test-cv64a6_imafdc_sv39.yaml
@@ -967,3 +967,23 @@ testlist:
     iterations: 1
     <<: *common_test_config
     asm_tests: <path_var>/riscv-arch-test/riscv-test-suite/rv64i_m/A/src/amoxor.w-01.S
+
+  - test: rv64im-pack-01
+    <<: *common_test_config
+    iterations: 1
+    asm_tests: <path_var>/riscv-arch-test/riscv-test-suite/rv64i_m/K/src/pack-01.S
+
+  - test: rv64im-packh-01
+    <<: *common_test_config
+    iterations: 1
+    asm_tests: <path_var>/riscv-arch-test/riscv-test-suite/rv64i_m/K/src/packh-01.S
+
+  - test: rv64im-packw-01
+    <<: *common_test_config
+    iterations: 1
+    asm_tests: <path_var>/riscv-arch-test/riscv-test-suite/rv64i_m/K/src/packw-01.S
+
+  - test: rv64im-brev8-01
+    <<: *common_test_config
+    iterations: 1
+    asm_tests: <path_var>/riscv-arch-test/riscv-test-suite/rv64i_m/K/src/brev8-01.S